Digital Electronics and Computer Organisation. - 22

 

Section A:

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1. Write Demorgan's Laws

Demorgan’s laws are fundamental in Boolean algebra and digital logic. The laws are as follows:

• First Law:
  $(A + B)' = A' \cdot B'$
  The complement of the OR operation equals the AND operation of the complements.

• Second Law:
  $(A \cdot B)' = A' + B'$
  The complement of the AND operation equals the OR operation of the complements.

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2. Differentiate between Flip-Flops and Latches

Feature	Flip-Flop	Latch
Triggering	Edge-triggered (on clock signal).	Level-triggered (based on input level).
Clock Dependency	Requires a clock signal to operate.	Operates without a clock signal.
Speed	Slower due to clock dependency.	Faster as it works directly on inputs.
Usage	Used in sequential circuits for registers.	Used in simple memory circuits.

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3. Differentiate between Combinational Logic Circuits and Sequential Circuits

Feature	Combinational Logic Circuits	Sequential Circuits
Memory	Do not have memory; output depends only on inputs.	Have memory; output depends on inputs and previous states.
Examples	Adders, Subtractors, Multiplexers, Decoders.	Flip-flops, Counters, Shift Registers.
Clock Signal	No clock signal required.	Requires a clock signal for operation.

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4. Construct a Half Subtractor Using Logic Gates

A half subtractor is a combinational circuit used to subtract two binary digits. It has two inputs ($A$ and $B$) and two outputs (Difference $D$ and Borrow $B$).

• Difference (D) = $A \oplus B$ (XOR gate).
• Borrow (B) = $A' \cdot B$ (AND gate with $A$ complemented).

Logic Circuit Diagram:

1. Use an XOR gate for the Difference output.
2. Use an AND gate with input $A'$ (complement of $A$) and $B$ for the Borrow output.

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5. Draw the Memory Hierarchy Structure

The memory hierarchy represents a pyramid-like structure based on speed and cost:

Hierarchy:

• Top (Fastest & Most Expensive): Registers
• Level 2: Cache Memory
• Level 3: Main Memory (RAM)
• Bottom (Slowest & Cheapest): Secondary Memory (HDD/SSD)

Mark Arrows:

• Speed increases as you go up the hierarchy.
• Cost decreases as you go down the hierarchy.

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Section B:

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6. Minimize the following Boolean function using K-map

F(A, B, C, D) = Σ (3, 4, 5, 7, 9, 13, 14, 15)

Solution Steps:

1. Construct the K-map:
   A 4-variable K-map has 16 cells representing all combinations of $A, B, C, D$. The given minterms (3, 4, 5, 7, 9, 13, 14, 15) are marked as 1 in the respective cells.

   K-map representation:

   $$\begin{array}{c|c|c|c|c} AB\backslash CD & 00 & 01 & 11 & 10 \\ \hline 00 & 0 & 0 & 1 & 0 \\ 01 & 0 & 1 & 1 & 1 \\ 11 & 1 & 1 & 1 & 1 \\ 10 & 0 & 1 & 1 & 0 \\ \end{array}$$

2. Group the 1's:

   • Form groups of $1$'s in powers of 2 (1, 2, 4, 8, etc.).
   • Group 8 cells: $A' + CD$
   • Group 4 cells: $B'C$.

3. Write the minimized equation: The minimized Boolean function is:

   $$F(A, B, C, D) = A' + CD + B'C$$

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7. (i) Convert SR Flip-Flop to JK Flip-Flop and draw the truth table

Conversion Process:

To convert an SR flip-flop into a JK flip-flop:

1. Connect the $J$ input to the $S$ input.
2. Connect the $K$ input to the $R$ input.

Truth Table:

J	K	Q (Present State)	Q+ (Next State)
0	0	0	0
0	0	1	1
0	1	0	0
0	1	1	0
1	0	0	1
1	0	1	1
1	1	0	1
1	1	1	0

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(ii) Implement 4:1 Multiplexer Using 2:1 Multiplexers

To implement a 4:1 multiplexer:

1. Use two 2:1 multiplexers at the first stage to handle the four inputs $I_0, I_1, I_2, I_3$.
2. Use a third 2:1 multiplexer at the second stage to select the final output.

Steps:

• Inputs $I_0$ and $I_1$ go to the first multiplexer, controlled by select line $S_0$.
• Inputs $I_2$ and $I_3$ go to the second multiplexer, controlled by select line $S_0$.
• The outputs of the two multiplexers are connected to the third multiplexer, controlled by select line $S_1$.

Output Equation:

$$Y = (S_1 \cdot (S_0 \cdot I_3 + S_0' \cdot I_2)) + (S_1' \cdot (S_0 \cdot I_1 + S_0' \cdot I_0))$$

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8. (i) Simplify the expression F(A, B, C, D) = ACD + AB + AD + B by K-map

Solution Steps:

1. Construct the K-map for the function $F(A, B, C, D)$ using the given terms.
2. Minimize by grouping 1's into the largest possible power-of-2 groups.

Simplified Result:

The minimized function is:

$$F(A, B, C, D) = AB + AC + BD$$

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(ii) How many flip-flops are needed to implement a 32-bit register?

A flip-flop stores 1 bit of data. For a 32-bit register:

$$\text{Number of flip-flops} = 32$$

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Section C:

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9. (i) Which gates are called universal gates and why?

Universal Gates:

The NAND and NOR gates are called universal gates because:

• They can be used to implement any Boolean function.
• Using only NAND or NOR gates, you can design any digital circuit without requiring additional gates.

Why Universal?

• NAND Gate:
  Using the NAND gate, we can implement the basic gates (AND, OR, NOT) as follows:

  • NOT: Connect both inputs of a NAND gate together.
  • AND: Use two NAND gates in combination.
  • OR: Combine NAND gates with appropriate connections.

• NOR Gate:
  Similarly, NOR gates can also implement all basic gates:

  • NOT: Connect both inputs of a NOR gate together.
  • OR: Use a NOR gate directly.
  • AND: Combine NOR gates with appropriate connections.

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9. (ii) Draw a full subtractor circuit using NAND gates.

Steps to Implement:

A full subtractor has:

• Inputs: $A, B, Borrow_{in}$
• Outputs: Difference (D) and Borrow Out (Borrow_{out})

Boolean Expressions:

1. Difference (D) = $A \oplus B \oplus Borrow_{in}$
   • Implement this using NAND gates to form the XOR logic.
2. Borrow_{out} = $(A' \cdot B) + (A' \cdot Borrow_{in}) + (B \cdot Borrow_{in})$
   • Break into smaller NAND gate combinations.

NAND Implementation:

• XOR gates for the Difference output are constructed using NAND gates.
• Use NAND gates to combine terms for the Borrow output.

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10. What do you mean by shift register? What is the need for shift registers? Draw and explain bidirectional shift register.

Definition:

A shift register is a sequential circuit made up of flip-flops that can store and transfer data. It shifts the data by one position for every clock pulse.

Types of Shift Registers:

1. Serial In - Serial Out (SISO)
2. Serial In - Parallel Out (SIPO)
3. Parallel In - Serial Out (PISO)
4. Parallel In - Parallel Out (PIPO)

Need for Shift Registers:

• Data storage for short-term applications.
• Data transfer in microprocessors and communication systems.
• Converting serial data to parallel (and vice versa).

Bidirectional Shift Register:

• Can shift data left or right based on control input.
• Consists of flip-flops and multiplexers to select the direction of data flow.
• Diagram includes:
  • Flip-flops connected in sequence.
  • Control lines to determine the shift direction.

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11. Draw and explain 4-bit binary synchronous counter.

Synchronous Counter:

• A counter where all flip-flops are triggered simultaneously by the same clock signal.
• A 4-bit binary counter counts from $0$ to $15$ (binary: $0000$ to $1111$).

Construction:

• Use four JK flip-flops.
• Connect $J$ and $K$ inputs of each flip-flop to $1$ (to toggle on each clock pulse).
• Use AND gates to ensure synchronous toggling.

Diagram:

• Flip-flops are connected in sequence.
• The output of each flip-flop toggles based on the ANDed output of the previous flip-flops.

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12. Differentiate between EPROM and EEPROM.

Feature	EPROM (Erasable Programmable ROM)	EEPROM (Electrically Erasable Programmable ROM)
Erasure Method	Erased using ultraviolet (UV) light.	Erased electrically.
Erasure Speed	Slower (UV exposure takes time).	Faster (electrical erasure is quick).
Write Cycles	Limited number of write cycles.	Higher write cycles compared to EPROM.
Cost	Less expensive.	More expensive.

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13. (i) Differentiate between ROM and PROM.

Feature	ROM (Read-Only Memory)	PROM (Programmable Read-Only Memory)
Programming	Pre-programmed during manufacturing.	Programmable once after manufacturing.
Reprogrammability	Cannot be reprogrammed.	Cannot be reprogrammed after initial write.
Cost	Cheaper for large production.	More expensive due to programmability.

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13. (ii) Describe USB.

USB (Universal Serial Bus):

• USB is a standard for connecting devices to a computer.
• Purpose: Facilitates communication and power supply between devices (e.g., keyboards, mice, storage drives).
• Features:
  • Plug-and-play capability.
  • Hot-swappable (devices can be connected or removed without shutting down the system).
  • Supports data transfer speeds from USB 1.0 to USB 3.2 and USB-C.

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13. (iii) Differentiate between Primary Memory and Secondary Memory.

Feature	Primary Memory	Secondary Memory
Type	Volatile (e.g., RAM).	Non-volatile (e.g., HDD, SSD).
Speed	Faster.	Slower.
Cost	More expensive per unit of storage.	Cheaper per unit of storage.
Examples	RAM, Cache memory.	Hard disk, SSD, USB drives.

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13. (iv) Explain the concept of Virtual Memory.

Virtual Memory:

• Virtual memory is a memory management technique where the system uses both RAM and disk storage to simulate a larger memory space.
• Allows programs to execute even if they exceed the size of physical RAM.

Key Features:

1. Uses paging and segmentation to manage memory.
2. Increases multitasking efficiency.
3. Enables programs to use more memory than physically available.

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13. (v) Draw the basic cell of memory.

Basic Memory Cell:

A basic memory cell is made using flip-flops or capacitors and transistors.

• For SRAM: A flip-flop stores each bit.
• For DRAM: A capacitor stores each bit.

The basic structure consists of:

1. A write line to store data.
2. A read line to fetch stored data.
3. Control signals for read/write operations.

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